Leti offers chip start-ups access to an emulator with Mentor


veloce2French microelectronics research organisation, Leti will provide access to the Mentor Veloce emulator for small firms and startups following a partnership with the EDA firm.

Emulation is a technique used by major chip firms in the development of complex ICs, which allows them to debug the design at early stages by validating software before committing to silicon.

However, emulators are high cost hardware systems which can be outside the budget of all but the largest IC design firms.

Leti will now offer European chipmakers access to its emulator, providing optimised implementation within the emulator, debug and analysis of results.

Thierry Colette, head of Leti’s IC design and embedded software division, writes:

“But because this powerful tool represents a major investment for microelectronics manufacturers or design houses, Leti is launching this special emulation service to provide our partners direct access to this technology and the benefits it offers.”

The Veloce emulator is a high-speed, multi-application tool for emulation of system-on chip (SoC) designs that was installed at Leti’s Grenoble facility in 2013.

It accelerates block and full SoC register-transfer level (RTL) simulations during all phases of the design process. It enables pre-silicon testing and debug.

“Veloce dramatically speeds up the design cycle, because it is 1,000 times faster than traditional RTL simulation tools,” said Colette.

To ensure data security, this emulator offer will include: a new chassis and cards representing an emulation capacity of 50 million gates at this stage and a dedicated and secure network using dedicated servers.


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