UltraSoC’s IP provides an independent system-level architecture that enables non-intrusive, wire-speed monitoring of the internal behavior of a system-on-chip (SoC).

It accelerates and de-risks development by giving engineers an intimate understanding of the complex interactions between on-chip sub-systems, buses and software.

The company recently announced comprehensive support for processors based on the RISC-V open source ISA; and announced the industry’s first debug system for SoCs using the ARM AMBA 5 Coherent Hub Interface (CHI).